GF 22FDX – ETH Zürich and QuickLogic Corporation

GF 22FDX – ETH Zürich and QuickLogic Corporation

Arnold: eFPGA implemented in an open source RISC-V microcontroller

ETH Zürich, Switzerland in collaboration with QuickLogic Corporation


Davide Pasquale Schiavone, Frank K. Gürkaynak,



Die size

3mm x 3mm

Design tool

Cadence IC v6.1.6


Arnold is a RISC-V based 32-bit micro-controller based on the open source PULPissimo system part of the PULP project developed by ETH Zürich and University of Bologna. PULPissimo uses a 32-bit RISC-V core with custom extensions for DSP applications called RI5CY and has 512kByte on chip SRAM memory and a set of peripherals that can copy data to and from memory over a microDMA.

What makes Arnold special is that it also houses an embedded FPGA (eFPGA) by QuickLogic Corporation that is connected as an accelerator with direct access to the shared local memory, offering many interesting opportunities to accelerate operations on the microcontroller.

The Chip has been tested and currently we are working on different demonstrator applications that highlights the various configurations of the eFPGA when working in concert with the PULPissimo system.

Block diagram of Arnold


ETH Zürich typically tapes out 10 to 20 ASICs per year, roughly half of those are for research projects, such as Arnold here. Our research concentrates on Energy Efficient Computing Architectures and to produce results that remain relevant, we need to have access to technologies with smaller feature sizes. EUROPRACTICE-IC service has been a very important partner for us to help us get access to GF22FDX. It is not only the access to the PDK but the support given throughout the submission process to ensure that we have ASICs that work properly.