SCHEDULES & PRICES

2024

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Schedules 2025

2025 RUN SCHEDULES AND PRICES

On this page you can find General MPW and mini@sic run schedules and prices for 2025.

If you need the 2024 schedules, please click here.

There are two prices in the EUROPRACTICE lists: Discounted and Standard.

DISCOUNTED PRICE

Three conditions should be met for Discounted prices:

Customer is an academic institution or a research facility from one of the 27 EU countries together with Albania, Armenia, Azerbaijan, Bosnia-Herzegovina, Georgia, Iceland, Israel, Liechtenstein, North Macedonia, Moldova, Montenegro, Norway, Switzerland, Turkey, Serbia, the UK and Ukraine.
Customer is a registered EUROPRACTICE member who has paid the Full-IC annual membership fee.
The intended design will be done for educational purposes or for publicly funded research.

STANDARD PRICE

Standard prices apply to all other customers.

To reserve your seat on a run, please register your design in the Registration Form or contact the EUROPRACTICE partner responsible for the technology.

ams OSRAM MPW	Feb	Apr	May	Jul	Oct	Nov
ams OSRAM 0.18µ CMOS atC18C6SH 6M/1P/HR/MIM/TW (Triple-well), 1.8V/3.3V		14			20
ams OSRAM 0.18µ CMOS 6M/1P/HR/MIM/TW (Triple-well), 1.8V/5.0V					20
ams OSRAM 0.35µ CMOS C35B4C3 4M/2P/HR/5V IO	24			14		3
ams OSRAM 0.35µ CMOS C35OPTO 4M/2P/5V IO	24			14		3
ams OSRAM 0.35µ HV CMOS H35B4D3 120V 4M/2P/HP			12			24
ams OSRAM 0.35µ HV CMOS OPTO 4M/2P/HP			12			24
Passive Interposer (TSV, RDL, Bumping)					6

Important notes: Dates are GDS submission deadlines. Design Registration and Export Control must be done at least 2 weeks in advance. Please download and complete Export control and 21B file here.

Dates in red are tentative runs.

ams OSRAM MPW Pricelist	Standard EUR / mm²	Discounted EUR / mm²
ams OSRAM 0.18µ CMOS atC18C6SH 6M/1P/HRP/TW (Triple-well), 1.8V/3.3V	1,650³	1,500³
ams OSRAM 0.35µ CMOS C35B4C3 4M/2P/HR/5V IO	640¹	580¹
ams OSRAM 0.35µ CMOS C35OPTO 4M/2P/5V	800²	700²
ams OSRAM 0.35µ HV CMOS H35B4D3 120V 4M	880¹	800¹

Important notes:

¹ Price = area (mm²) * price/mm² with min. fabrication cost equivalent to 10mm²

²Price = area (mm²) * price/mm²with min. fabrication cost equivalent to 20mm²

³Price = area (mm²) * price/mm²with min. fabrication cost equivalent to 5.5mm²

Fraunhofer IISB		Jan	Feb	Mar	Apr	May	Jun	Jul	Aug	Sep	Oct	Nov	Dec
4H-SiC CMOS HIGH TEMPERATURE			7

Important notes: Dates are GDS submission deadlines. Design registration must be done at least 4 weeks in advance.

The first design submission (for our review and feedback) must be done on January 10, 2025. Fab-in: March 7, 2025.

For new PDK download please ask virtual-asic@iis.fraunhofer.de

Fraunhofer IISB Pricelist		Standard EUR / block	Discount EUR / block
4H-SiC CMOS HIGH TEMPERATURE (2.5mm x 5mm)¹		10,900	9,900
4H-SiC CMOS HIGH TEMPERATURE (5mm x 5mm)²		21,250	19,250

Important notes:
¹Max. design surface: 2.35mm x 4.85mm

²Max. design surface: 4.85mm x 4.85mm

Larger chip sizes and pricing are available on request.

GLOBALFOUNDRIES MPW	Jan	Feb	Mar	Apr	May	Jun	Jul	Aug	Sep	Nov	Dec
GLOBALFOUNDRIES SiGe 8XP			4						2		8
GLOBALFOUNDRIES 130nm BCDlite – Gen2	1					8		31
GLOBALFOUNDRIES 55 nm BCDlite			10			16			8		25
GLOBALFOUNDRIES 45RFE		11							2
GLOBALFOUNDRIES 45nm RFSOI	7						8
GLOBALFOUNDRIES 45nm SPCLO – Silicon Photonics				8				19			10
GLOBALFOUNDRIES 28 nm SLPe	27				26				8
GLOBALFOUNDRIES 22 nm FDSOI	13		3	20		8		4	30	15
GLOBALFOUNDRIES 12 nm LP+			12			11			10
GLOBALFOUNDRIES 180 MCU (open-source PDK)								4

Important notes: Dates are Registration deadlines after which designs cannot be accepted.

Final GDSII file must be submitted within 6 weeks after this date.

Dates in red are preliminary.

A cancellation fee is applicable if the registration is cancelled later than 2 weeks after the Registration deadline or if the customer is unable to provide a DRC-clean GDS before the Tapeout deadline.

GLOBALFOUNDRIES MPW Pricelist	Standard EUR / mm²	Discounted EUR / mm²
GLOBALFOUNDRIES SiGe 8XP	5,060 ¹	4,600 ¹
GLOBALFOUNDRIES 130 nm BCDlite	1,760 ¹	1,600 ¹
GLOBALFOUNDRIES 55 nm BCDlite	5,720 ²	5,200 ²
GLOBALFOUNDRIES 45RFE	10,230 ¹	9,300 ¹
GLOBALFOUNDRIES 45RFSOI	10,230 ¹	9,300 ¹
GLOBALFOUNDRIES 45nm SPCLO -Silicon Photonics (price per fixed block 5mm x 5mm)	242,000	220,000
GLOBALFOUNDRIES 28 nm SLPe	12,430 ³	11,300 ³
GLOBALFOUNDRIES 22 nm FDSOI	18,975 ³	17,250 ³
GLOBALFOUNDRIES 12 nm LP+	31,240 ³	28,400 ³
GLOBALFOUNDRIES 180 MCU (Open PDK)	913 ⁴	830 ⁴

Important notes:

¹ Price = area (mm²) * price/mm² with min. fabrication cost equivalent to 12 mm². Any edge length between 1.0 mm to 11 mm is possible. The mentioned die size is referred to the Pre-Shrink die size.

² Price = area (mm²) * price/mm² with min. fabrication cost equivalent to 9 mm². Any edge length between 1.0 mm to 11 mm is possible. The mentioned die size is referred to the Pre-Shrink die size.

³ Price = area (mm²) * price/mm² with min. fabrication cost equivalent to 4 mm². The mentioned die size is referred to the Pre-Shrink die size.

⁴ Price = area (mm²) * price/mm² with min. fabrication cost equivalent to 6 mm². The mentioned die size is referred to the Pre-Shrink die size.

GLOBALFOUNDRIES mini@sic	Jan	Feb	Mar	Apr	May	Jun	Jul	Aug	Sep	Nov	Dec
GLOBALFOUNDRIES SiGe 8XP			4						2		8
GLOBALFOUNDRIES 130nm BCDlite – Gen2	1					8		31
GLOBALFOUNDRIES 55 nm BCDlite			10			16			8		25
GLOBALFOUNDRIES 45RFE		11							2
GLOBALFOUNDRIES 45nm RFSOI	7						8
GLOBALFOUNDRIES 45nm SPCLO – Silicon Photonics				8				19			10
GLOBALFOUNDRIES 28 nm SLPe	27				26				8
GLOBALFOUNDRIES 22 nm FDSOI	13		3	20		8		4	30	15
GLOBALFOUNDRIES 12 nm LP+			12			11			10

Important notes: The mini@sic model of GlobalFoundries is available only for universities and research institutes.

Dates are Registration deadlines after which designs cannot be accepted.

Final GDSII file must be submitted within 6 weeks after this date.

Dates in red are preliminary.

GLOBALFOUNDRIES mini@sic Pricelist	Standard EUR / mm²	Discounted EUR / mm²
GLOBALFOUNDRIES SiGe 8XP	7,260 ¹	6,600 ¹
GLOBALFOUNDRIES 130nm BCDlite – Gen2	3,080 ²	2,800 ²
GLOBALFOUNDRIES 55 nm BCDlite	8,250 ¹	7,500 ¹
GLOBALFOUNDRIES 45RFE	13,200 ¹	12,000 ¹
GLOBALFOUNDRIES 45RFSOI	13,200 ¹	12,000 ¹
GLOBALFOUNDRIES 45nm SPCLO -Silicon Photonics	154,000 ⁴	140,000 ⁴
GLOBALFOUNDRIES 28 nm SLPe	18,370 ³	16,700 ³
GLOBALFOUNDRIES 22 nm FDSOI	25,080 ³	22,800 ³
GLOBALFOUNDRIES 12 nm LP+	38,500 ³	35,000 ³

Important notes:

¹ Price = area (mm²) * price/mm² with min. fabrication cost equivalent to 2.5 mm². The mentioned die size is referred to the Pre-Shrink die size.

² Price = area (mm²) * price/mm² with min. fabrication cost equivalent to 5 mm². The mentioned die size is referred to the Pre-Shrink die size.

³ Price = area (mm²) * price/mm² with min. fabrication cost equivalent to 1 mm².The mentioned die size is referred to the Pre-Shrink die size.

⁴ Price = fixed block size of 5mm x 2.455mm or 2.455mm x 5mm.

IHP MPW	Feb	Mar	Apr	Jul	Aug	Oct	Nov
IHP SG13C SiGe:C RF CMOS			28		11		10
IHP SG13G2 SiGe:C Bipolar/Analog			28		11		10
IHP SG13G2Cu (FEOL process SG13G2 + Cu BEOL option from X-FAB)	24				11		10
IHP SG13G3Cu (FEOL process + Cu BEOL option from X-FAB)	24				11		10
IHP SG13G3 (FEOL process SG13G3Cu + Al-BEOL option)*					11		10
IHP SG13S SiGe:C Bipolar/Analog			28		11		10
IHP SG13SCu (FEOL process SG13S + Cu BEOL option from X-FAB)	24						10
IHP MEMRES for SG13S			28				10
IHP BEOL SG13 (M1 and Metal Layers Above) + optional LBE or TSV	7
Open-Source IHP SG13G2 SiGe:C Bipolar/Analog		31
Open-Source IHP SG13 CMOS					18
IHP SG13_Interposer Bipolar/Analog 7M				14
IHP SG25H5_EPIC high performance BiCMOS + Photonic						6

Important notes:

Dates are Registration and Export Control information deadlines. Please download the Export Control file here.

Final GDSII file must be submitted within 10 calendar days after this date.

Final chip area incl. Sealring_complete must be provided 7 calendar days after the regsitration

The final chip area may not deviate by more than 5% from the registered area including the sealring.

Chip thickness different from 300µm or 200µm require extra fee.

MEMRES is available for IHP SG13S technology with extra charge.

TSV is available for IHP SG13S and SG13G2 technologies with extra charge.

Cu Pillar and Bumping are available for all IHP technologies with extra charge; SG13C on request.

Local Backside Etching (LBE) is not offered for EPIC runs and runs with Cu-BEOL.

* For research and prototyping purposes only.

IHP MPW Pricelist	Standard EUR / mm²	Discounted EUR / mm²
IHP SG13C SiGe:C RF CMOS	4,500 ¹	3,825 ¹
IHP SG13G2 SiGe:C Bipolar/Analog	7,300 ¹	6,205 ¹
IHP SG13G2Cu (FEOL process SG13G2 + Cu BEOL option from X-FAB)	7,300 ^1,	6,205 ¹
IHP SG13G3Cu (FEOL process + Cu BEOL option from X-FAB)	9000 ¹	7,650 ¹
IHP SG13G3 (FEOL process SG13G3Cu + Al-BEOL option)*	9,000 ¹	7,650 ¹
IHP SG13S SiGe:C Bipolar/Analog	6,300 ¹	5,355 ¹
IHP SG13SCu (FEOL process SG13S + Cu BEOL option from X-FAB)	6,300 ¹	5,355 ¹
IHP SG25 PIC (Photonics, Ge Photo-diode, BEOL)	3,800 ^1,3	3,230 ^1,3
IHP SG25H5_EPIC high performance BiCMOS + Photonic	8,000 ^1,3	6,800 ^1,3
IHP BEOL SG13 (M1 and Metal Layers Above) + optional LBE or TSV or RDL	1,000 ¹	850 ¹
IHP Special Services
Bumping (available for all IHP technologies), SG13C on request	6,500²	6,500 ²
Localized Back side Etching (available for IHP technologies with AL BEOL only), not offered for EPIC/PIC runs	5,000²	4,250 ²
TSV to ground (SG13S / G2)	12,500 ²	10,625 ²
Cu Pillar	18,500²	on request
MEMRES Module one time fee for SG13S only	2,500²	2,000²
MEMRES Module additional fee per mm² for SG13S only	600¹	510¹
TSV_RDL Module one time fee for SG13S and SG13G2	27,000²

Important notes:

¹ Price = area (mm²) * price/mm² with min. fabrication cost equivalent to 0.8mm².
The chip area is inclusive of the filler cells outside the seal ring.
² One-off fee
³ Delivery quantity: 25 dies.

Fabrication of a chip area less than 0.8mm² and X & Y ratio larger than 1:3 is on request.

* For research and prototyping purposes only.

Standard MPW price is meant for designs of industrial customers.

Discounted MPW price is meant for designs created for educational purposes or publicly funded research for non-EU countries.

IHP mini@sic	Feb	Mar	Apr	Jul	Aug	Oct	Nov
IHP SG13C SiGe:C RF CMOS			28		11		10
IHP SG13G2 SiGe:C Bipolar/Analog			28		11		10
IHP SG13G2Cu (FEOL process SG13G2 + Cu BEOL option from X-FAB)	24				11		10
IHP SG13G3Cu (FEOL process + Cu BEOL option from X-FAB)	24				11		10
IHP SG13G3 (FEOL process SG13G3Cu + Al-BEOL option)*					11		10
IHP SG13S SiGe:C Bipolar/Analog			28		11		10
IHP SG13SCu (FEOL process SG13S + Cu BEOL option from X-FAB)	24						10
IHP MEMRES for SG13S			28				10
IHP BEOL SG13 (M1 and Metal Layers Above) + optional LBE or TSV	7
Open-Source IHP SG13G2 SiGe:C Bipolar/Analog		31
Open-Source IHP SG13 CMOS					18
IHP SG13_Interposer Bipolar/Analog 7M				14
IHP SG25H5_EPIC high performance BiCMOS + Photonic						6